Filtered the main data of the new SoC for servers AMD Snowy Owl, which will be based on Zen cores such as AMD Ryzen and AMD RX Vega graphics.
AMD is trying to take advantage of the company's good moment in the processor market, to launch to the market, the more solutions the better, competing against Intel in quantity of solutions, more than in quality. The new bet is high-end processors with Zen architecture for processors, such as AMD Ryzen and AMD RX Vega graphics. These new AMD SoCs are called Snowy Owl, which will be part of the EPYC 3000 family of processors.
AMD's bet is to offer an infinity of solutions, which give good performance, for a price lower than the competition. This is clearly reflected in the Ryzen 3, Ryzen 5 and Ryzen 7, the Ryzen Threadripper Workstation processors, the mobile processors, the Ryzen 5 Mobile and the Raven Ridge and of course, the EPYC processors, intended for servers. Snowy Owl is designed for this last segment, but in this case they are SoC developers for embedded servers, simple, for small companies and that do not have to invest so much money in more powerful and complex solutions, which give equally quality performance.
Snowy Owl is the name of the SoC family and the EPYC 3251 will be its first exponent, within the EPYC 3000 family. This new processor will be an integrated socket type SP4r2 BGA or what is the same, it will be directly soldered to the PCB. These new SoCs are a reduced version of the Naples, but in this case they will reach up to 16 cores and the Vega version will possibly be quite shortened, although there is no data on this. AMD will launch two versions, a single-chip or SCM module, which will have a top of eight cores and sixteen processing threads or a multichip module or MCM, which will be able to reach sixteen cores and thirty-two threads.
This solution comes to compete directly against the Xeon-D, with some interesting advantages. Both families of processors compare the maximum number of cores and processing threads, but the Snowy Owl offers memory support in Quad Channel configuration, while the Xeon-D only offers support for Dual Channel memory. AMD's SoCs have 32MB of L3 cache compared to 24MB of L3 cache for Intel's SoCs, and this AMD solution doubles the number of PCIe lanes, with a total of 64 lanes.
Source: wccftech
They sound interesting, although it would be more interesting to refine the chip so that the 16 cores fit on a single chip, on the other hand it seems to me that the architecture is being over-exploited, to enter all ranges and segments it must be very good ... for example with Ryzen Mobile with TDP's from 9-25 watts to enter with Epyc. It will also be necessary to see how long the taste of AMD lasts, from my point of view it needs to accelerate the next generation of the architecture and differentiate them more with high performance and one specifically with very low consumption, but that also allows to sustain the performance that already is reached in this last segment.