PCI-SIG announces that PCIe 6.0 will have 64 GT/s per lane

PCI-SIG, the organization that developed the PCI Express (known as PCIe) standard and is widely used for graphics, NVMe SSDs, network cards and other components of motherboards; has announced the official release of the PCIe 6.0 specification. This POCie 6.0 specification will support data transfer speeds of up to 64 GT/s.
PCI Express has been the de facto connectivity standard. PCIe 6.0 doubles the bandwidth and power efficiency of PCIe 5.0 (of 32 GT/s), while maintaining low latency and low bandwidth overhead.
PCIe 6.0 is announced, now it remains to be implemented
According to Al Yanes, President of PCI-SIG.; PCIe 6.0 technology is a cost-effective and scalable interconnect solution that will continue to impact data-intensive markets such as data center, AI/ML, HPC, automotive, IoT, and military/aerospace. It also protects industry investments by maintaining backward compatibility with all previous generations of PCIe technology.
Together with the announcement of PCie 6.0, the following characteristics have been confirmed that they must have to be considered de facto as PICe 6.0:
- 64 GT/s raw data rate and up to 256 GB/s using x16 configuration.
- Pulse amplitude signaling with 4 levels (PAM4) and taking advantage of the PAM4 already available in the industry.
- Lightweight Forward Error Correction (FEC) and Cyclic Redundancy Check (CRC) that mitigate the increased bit error rate associated with PAM4 signaling.
- Flit-based encoding (flow control unit) that is compatible with PAM4 modulation and that allows gaining more than twice the bandwidth.
- Updated the design of the packages used in Flit mode to provide additional functionality and simplify processing.
- Maintain compatibility with all previous generations of PCIe technology.
Source: Guru3D

