They create a GPU that has 1.2 billion transistors designed for Artificial Intelligence
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A startup called Cerebras has created a wafer-sized GPU for Artificial Intelligence with 1.2 trillion transistors
Artificial intelligence and supercomputing are on the rise today and special solutions are needed. Cerebras System, a little-known startup, has shown the prototype of a graphics chip that goes beyond what we know. This company has created the Cerebras Wafer Scale Engine (Cerebras WSE) that counts 5 times more than the NVIDIA V600 GPU of 100 million transistors.
We have before us the world's first wafer-scale GPU. The fact that this has not been done before is because cooling so much surface is a great technical challenge. In addition, there is also the problem of cross-line communication that until now had not been overcome.
Cerebras creates a GPU the size of a silicon wafer
They have developed a lithographic system designed to etch transistors onto a wafer. This is also a big challenge, since you cannot write transistors on a single wafer. Layout lines are created within the platform and communication systems need to be created between sets. Cerebras has managed to solve it and thus has created the processor with the largest number of transistors in the world.
The surface area of this chip is 46,225mm² and it houses 1.2 billion transistors. All the cores have been developed specifically for Artificial Intelligence and have a consumption of 15kW. Cooling silicon is a major problem and this has required developing a special dissipation system.
The thermal problem has been solved by means of an immersion cooling system using freon as a refrigerant. Additionally, a robust energy system is needed to avoid damage. This processor is about 1 times faster than traditional systems. This is because communication is done by writing lines.
Specially developed for Artificial Intelligence
WSE has 400 cores of Sparse Linear Algebra. This allows for flexible, programmable and computationally optimized cores for neural networks. It offers a great programming capacity, which allows the cores to execute all the algorithms in the field of Deep Learning.
All WSE cores communicate through a Swarm communication fabric in a 2D mesh with a bandwidth of 100Pb / s. Swarm is a massive, high-bandwidth communication fabric with low latency. This system is highly efficient at the energy level thanks to the techniques used to group the graphic processing units. The software configures the WSE cores to support precise communication as needed. Depending on your needs, Swarm allows you to create a unique and optimized communication path.
In addition, this chip has 18GB of onboard memory, accessible in a single clock cycle. It offers a memory bandwidth of 9PB / s. Capacity is improved by 3 times and bandwidth 000 times greater than its competitor. Increasing the cores and local memory, allows a fast and flexible calculation, reducing latency and consuming less power.
This chip has been manufactured on a 300mm wafer from TSMC using 16nm lithography. This lithographic process is not the most modern, but it is very well optimized. The 400 cores are encompassed in 000 interconnected modules.
Problems when manufacturing this chip
Currently we do not know the performance and frequencies of the Cerebras WSE. The chip enables 100% performance if it is capable of absorbing defects. The prototypes made have a design that allows absorbing design defects. The CEO of the company ensures that between 1-1.5% of surface area defects can be absorbed.
This chip has a design that allows the faulty cores to be absorbed, reconfiguring the available cores. The design also has redundant cores on the chip, allowing you to minimize performance loss. The working frequencies have not been disclosed.
The company has even had to develop its own manufacturing science and its own encapsulation. They have had to face the challenge of the lack of design tools to handle a wafer-sized processor. In addition, the software has had to be modified so that it can produce more than 1 trillion transistors on a single processor.
Source: wccftech
