PCI Express 6.0 standard according to PCI-SIG will be ready in 2021

The most advanced onboard peripheral interface standard currently available is PCI Express 4.0. At present, only AMD has integrated it into its processors (and consequently, motherboards) and graphics cards. Meanwhile, PCI-SIG, which is responsible for standardizing the PCI Express interface , continues to develop future standards, such as PCI Express 6.0.

PCI-SIG has already ratified the PCI Express 5.0 interface and is now developing the PCI Express 6.0 interface. They currently have version 0.5 of this new interface ready, which they hope to launch in 2021. By the end of the year, version 0.7 of this connection interface is expected to arrive.

The PCI Express 6.0 interface should be ready by 2021

About the PCI Express 6.0 interface, we know some technical data that give us a glimpse of the great leap it will make in terms of performance. As indicated, it will offer a new level of interconnectivity in IT systems. It will offer up to two times the transfer speed of PCIe 5.0 and up to four times the speed of PCIe 4.0.

Basically the PCIe 6.0 interface will offer us the same bandwidth as a PCIe 3.0 x8 lane. The PCIe 3.0 x8 interface is more than enough for most expansion cards on the market, except for the highest-end graphics.

Currently the PCI Express 6.0 interface has met most design requirements and certain expectations would have been exceeded. Despite everything, work continues on aspects such as an improvement in consumption.

This new interface will additionally add the error correction called Forward Error Correction (FEC), which will help in improving reliability and increasing bandwidth efficiency. Enhancements have been added to PAM-4 signals, which combined with FEC will help meet bandwidth requirements.

The PCI Express 6.0 interface has been specially developed to meet the future needs of computing. Above all, they have focused on Machine Learning, AI, Cloud Computing and Cloud Data Storage, among others. Additionally this year will arrive the 800G Ethernet cards, which have high connectivity requirements. With all of these bandwidth consuming standards, the PCI Express interface needs to adapt.

In addition to meeting the needs, PCI-SIG seeks to do so with low costs. One of the key aspects of the PCI Express 6.0 standard is that it will be backward compatible.

Most important features

• PCI Express 6.0 offers 64GT / s raw bit rate and up to 256GB / s using x16 configuration
• Use of PAM-4 (four-level pulse width modulation) encoding and leverages industry-existing 4G PAM-56
• Includes low latency Forward Error Correction (FEC) with additional mechanisms to improve bandwidth efficiency
• Maintains compatibility with all previous generations of the PCI Express standard

We have to highlight that the publication of the standard will be for 2021, two years after the publication of PCI Express 5.0. Curiously, the deployment of the PCI Express 5.0 interface should begin in 2021. The first devices based on the PCI Express 6.0 interface would not arrive, at the earliest, until 2023.

Source: OC3D