Intel has unveiled its first mesh-to-mesh direct photonic fabric at the Hot Chips 2023 chip conference. The octa-core, 528-thread chip that Intel used for its demo has a 66-threads-per-core architecture, which allows a data transmission rate of up to 1 TB/s. The chip only consumes 75 W of power, of which 60% corresponds to the optical interconnections.
The design could eventually allow direct connection of systems with two million cores with a latency of less than 400 ns. Intel's PUMA (Programmable Unified Memory Architecture) chip is part of the HIVE program of DARPA. It focuses on improve performance in petabyte-scale graph analysis work, for 1000x performance per watt improvement in hyperspaced workloads.
INTEL's Unified Programmable Memory Architecture is seen
The test chip uses a custom RISC architecture for optimized performance in graphics analysis workloads. This gives an 8x improvement in single threaded performance. It has been built using TSMC's 7nm process, not Intel's internal nodes.
After characterizing the target workloads, it was concluded that it needed to create an architecture that would solve the challenges associated with extreme memory subsystem stress, deep pipelines, branching predictors, and out-of-order logic created by the workload.
Intel's custom core employs extreme parallelism on the order of 66 hardware threads for each of eight cores. It has 32 optical I/O ports that operate at 32 GB/s/dir each, for a total of 1 TB/s of bandwidth. Intel has manufactured the chip on TSMC's 7nm process, with 27.600 billion transistors on a 316mm^2 die.
It features four eight-channel high-speed optical I/O chiplets, which connect internal electrical signals to external optical interconnects. These units connect via Intel's EMIB encapsulation and use the AIB protocol. With all this, the chip consumes only 75 W. Intel claims that the improved performance of optical networking allows for near-perfect linear scaling of performance from one to 1.000 cores.
Source: Tom's Hardware
