Intel: Complete Redesign of EU ISA Instructions for Xe GPUs Coming in 2020
The Intel EU ISA instructions, which were introduced in 2004, will be completely redesigned for Tiger Lake (Gen12) graphics arriving in 2020.
The graphics card market is nearing a major paradigm shift. Currently, NVIDIA dominates the market with little opposition from AMD, although RDNA is showing promise . This situation could change in 2020, as Intel is planning to launch its first dedicated Xe graphics cards. According to GitLab, the 12th generation (Tiger Lake) will feature a significant update to the Intel EU ISA instructions introduced in the i965 processor.
Intel EU ISA are instructions for execution units that are integrated into current iGPUs. This set of instructions has not undergone major changes since they were introduced in 2004. This is because the company has focused on iterative performance improvements and little else.
Important changes to the Intel EU ISA instructions for GPUs
Raja Koduri has promised to double the power with each new generation of processors. For the Intel Xe a major restructuring of the graphics architecture and the technologies they integrate is required. To do this they have redesigned the EU ISAs from the ground up, in order to optimize for Xe GPUs.
“This merge request implements support for ISA Gen12 (Tiger Lake) on the back-end of the i965 / Iris compiler.
Gen12 is planned to include one of the most detailed Intel EU ISA projects since the original i965. The coding of nearly every instruction field, hardware opcode, and register type must be updated in this merge request,” GitLab specifies .
Tiger Lake (Gen12) will be Intel's total graphics makeover coming in 2020 with new I / O technology and a new Core architecture. This year in terms of processors, we have not seen anything relevant to date from Intel. It is expected that in 2020 we will see the first dedicated graphics and that these will be powerful. Plus, Koduri has promised to double the power with every generation, starting with Tiger Lake.
