Synopsys has the first CXL and CCIX solutions ready under the PCIe 5.0 interface

First prototypes of Synopsys based on CXL and CCIX under the PCIe 5.0 interface, which will allow faster and more efficient communication between components.

Compute Express Link technology powered by Intel is starting to pay off. During ArmTechCon, the Synopsys company has shown the first CXL solutions as well as CCIX under PCIe 5.0. The company's IP has been launched and can also be licensed by the different manufacturers. Let us remember that among the companies annexed to the CXL association is AMD.

CXL and CCIX are technologies that allow processors and other chips to be interconnected. This technology offers high communication speeds, memory consistency, and low cache latencies. The two protocols are designed to offer heterogeneous systems based on the use of processors. These processors are combined with scalar, vector, matrix and spatial architectures.

Synopsys shows the first functional versions of CXL and CCIX

These two communication standards are based on the PCIe 5.0 interface. This new standard offers 32GT / s for each track and natively supports different types of links. CXL and CCIX, despite using the same interface, have important differences in hardware, software and firmware.

Both protocols will have to compete to achieve supremacy in the market. Silicon manufacturers, such as Intel and AMD, will support CCX and CCIX in a large number of products.

Synopsys recently showcased the 16mm DesignWare CLX IP solution. This SoC-based solutions based on the 16mm, 10mm and 7mm FinFET processes. CXL 1.1 compliant driver is included. It supports the CXL.io, CXL.cache and CXL.mem protocols. The Silicon Verified PCIe 5.0 Controller features a low silicon PCIe 32GT / s PHY controller with RAS and VC Verification IP capabilities.

Although the availability of the IP DesignWare CCIX 1.1 package that enables the CCIX 1.1 implementation has not been announced. Anantech has had access to the prototype, which promises a lot.