Intel's Tiger Lake-Y @ 10nm will arrive with more cache and PCIe 4.0

Robert Sole 2 December, 2019

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Something that is not usually discussed is one of the interesting implementations of the Skylake architecture. This architecture from Intel created a different cache structure for the more efficient line of HEDT processors. The company would be making new cache adjustments for the Tiger Lake @ 10nm architecture. They would be looking to offer the best possible performance for this new iteration of processors.

This doesn't change the fact that Intel is having problems with its 10nm lithography, which we don't know if it will ever be available for desktop processors. Adding to this problem is the fact that demand exceeds processor production capacity. And to top it all off, the company's new 10th Gen HEDT processors can't compete with the Ryzen 3000 series.

Intel wants to restructure the cache at Tiger Lake

For Skylake architecture processors destined for the HEDT market (Skylake-X), we bet on more L2 cache. The company decided to reduce the L3 cache in favor of the L2 cache. This move is interesting, since L2 has lower latencies than L3.

There is talk that Intel could make a similar move with the Tiger Lake-Y. As indicated, they would be betting on expanding the L1, L2 and L3 cache. This increased cache would make the new 10nm processors more efficient and somewhat more powerful.

Tiger Lake-Y @ 10nm processors will arrive with more cache and with PCIe 4.0

Geekbench in its information highlights that the Ice Lake-Y will arrive with up to 4 cores and 8 threads. As indicated, each core will have 1280KB (1.25MB) of L2 cache, adding a total of 5120KB (5MB). The L2 cache improvement over current processors is 400%. The L3 cache will also be increased by 50%, with a total of 12MB. In addition, Intel would increase the L1 cache for instructions, becoming 48KB, but for data it would be 32KB.

An increase in cache that does not mean the loss of L3 cache, which represents a notable increase in the performance of the processors. In addition Tiger Lake-Y would implement the PCIe 4.0 lanes, something that is not present in other processors of the company.

Tiger Lake-Y would finally arrive between 2020 and 2021, without a specific release date. These new processors will be based on the 10nm and will come to replace the Ice Lake-Y. As always, this information is going to be received with interest but considering that they are rumors, there are no confirmations.

Source: wccftech